Instruction Level Abstraction for Accelerators: A Study of the Support Vector Machine Accelerator

Abstract

Instruction Level Abstraction (ILA) is a formal specification of hardware accelerators, which are separate chips that perform specialized tasks very efficiently. ILA allows for formal verification, and also the creation of reliable simulators and compilers. This thesis covers the creation of an ILA for the Support Vector Machine Accelerator (SVMA), which provides an efficient implementation of the Support Vector Machine (SVM) classification algorithm. One simple and one complex example of an accelerator with a functional ILA are studied in this paper to provide context and background. A full outline of the SVMA ILA implementation is then considered, and results from functionality tests are discussed.