Bidirectional Adaptive Body Bias Process Variation Compensation Circuit in 90nm CMOS Technology

Abstract

Continuous device scaling and power scaling coupled with lithographic limitations have led to unacceptable levels of performance variation and an exponential increase in static power consumption. Effective measures to mitigate variation induced leakage and performance overhead are therefore greatly in demand. Previous compensation circuit solutions implore significant area-overhead solutions. In contrast, this thesis presents a low area overhead (512T) mix-signal compensation circuit, which can detect variation in performance and leakage and correct the variation to acceptable values.