Excess noise in amplifiers poses a significant limitation on scan rate in the comprehensive search for axion dark matter. For this reason, the quantum-limited parametric amplifier is essential to axion detection experiments. Due to its ability to provide broadband, quantum-limited amplification at hundreds of MHz, the KI-TWPA is the amplifier of choice for low-frequency applications such as the Princeton Axion Search. Despite experimental progress in the use of these devices, a rigorous analytical model for quantum noise does not exist for KI-TWPA systems. In this paper, a simplified quantum noise model for the KI-TWPA is formulated from the ground up, and some basic implications of such a model are discussed.

Several pieces of indirect evidence suggests that a quarter of the energy density of the universe consists of dark matter. The invisible axion is a good candidate that can be detected using a laboratory scale experiments through its coupling to photons in the presence of a large, DC magnetic field. DMRadio is one such experiment that uses a lumped-element resonant circuit as the primary mode of enhancement of signal for sub-ueV axion detection. In order to achieve high signal-to-noise ratio in the readout, this work describes the characterization and improvement of a high-gain, low-noise amplifier (LNA) circuit. The LNA has previously been used in a closed-loop configuration, but this sacrifices bandwidth and gain. This work examines an open-loop configuration board with 3 junction field effect transistors (JFETs) to preserve low noise characteristics while boosting bandwidth and gain. Testing of the LNA revealed instabilities in gain related to temperature changes of the components and internal variability of saturation currents of JFETs. Temperature trends, DC offset values, and various resonances with coaxial cables of the board were observed against LNA gain. From understanding these behaviors, temperature control solutions of a heatsink and a piezoelectric fan are proposed. Various inadequacies arose in the JFET matching procedure necessary to create a functioning board. A new method, focused on increasing measurement quality, and reducing time and complexity using socketed test fixtures for JFET characterization is proposed.