SHARE: Sustainable Heterogeneous Architectures can Reduce Emissions by Sharing Memory

Abstract

Though hardware accelerators decrease the operational carbon emissions of contemporary systems-on-chip (SoCs), their significant area, and thus embodied carbon cost, makes their impact on the overall lifetime sustainability of a chip less clear. As opposed to instantiating separate hardware for each accelerated application kernel, time sharing hardware resources for multiple kernels can decrease the total chip area required for acceleration, at the cost of increased energy consumption. This paper examines a spectrum of methods for this hardware sharing, in order to find the architectures which optimally trade off operational and embodied carbon emissions. Our analysis quantifies the carbon impact of sharing for both compute and memory hardware. We show that the decreased area and power consumption which comes with highly specialized compute hardware outweighs the benefits of sharing compute hardware with a reconfigurable fabric. Importantly, however, the power and area overhead required to share memory hardware is low, and so sharing memory comes with a substantial carbon-efficiency improvement. Hence, the best option is fixed-function accelerators which keep compute separate but maximally share on-chip memory hardware. Our analysis also shows sustainable sizing options for tailoring these shared memory pools to the memory needs of an application's accelerator collection.