100 Pixel 2.8 THz CMOS Camera: Analog Circuitry Design

Abstract

A 100 pixel detector array is created in a 65 nm CMOS process for video-rate (30 fps) active 2.8 THz imaging. Each pixel in the 10x10 array contains a rectangular patch antenna and a single common-gate transistor to rectify the incident THz signal and a low noise amplifier to amplify and buffer the signal before multiplexing. The chip’s digital circuitry and output amplifier are capable of over-clocking to 300,000 fps, allowing for post-sampling averaging to increase SNR by a factor of roughly 10x (20 dB). The chip achieves a simulated NEP of 33 pW/√Hz and a responsivity of 68 kV/W, which is comparable to or better than existing detectors, and does so at a higher frequency (3x higher on average) than almost all of them. This paper focuses on the design and layout of the LNA, output amplifier, and associated analog circuitry in the chip.