Publication: Formal Verification of Key Components of Intel TDX Firmware
datacite.rights | restricted | |
dc.contributor.advisor | Malik, Sharad | |
dc.contributor.author | Ateyeh, Ahmad O. | |
dc.date.accessioned | 2025-08-12T16:31:19Z | |
dc.date.available | 2025-08-12T16:31:19Z | |
dc.date.issued | 2025-04-14 | |
dc.description.abstract | As computing evolves and the use of cloud environments increases, there is growing concern over security and data confidentiality. Virtual machine-based trusted execution environments (VM-based TEEs) have emerged as a promising solution due to their flexibility and scalability. This thesis presents a formal verification framework for reasoning about the correctness of the Intel TDX firmware—a central component of a prominent VM-based TEE. Using CBMC, a suite of abstraction strategies, and modular verification reasoning, the framework enables tractable analysis of this complex, real-world system. The methodology is specifically applied to the TD creation sequence, demonstrating that the verification process successfully validates correct flows and reliably detects errors when deviations occur. Beyond TDX, this work contributes to the broader goal of developing a scalable and rigorous methodology for evaluating secure processor architectures and ensuring their reliability in real-world deployments. | |
dc.identifier.uri | https://theses-dissertations.princeton.edu/handle/88435/dsp01st74ct923 | |
dc.language.iso | en_US | |
dc.title | Formal Verification of Key Components of Intel TDX Firmware | |
dc.type | Princeton University Senior Theses | |
dspace.entity.type | Publication | |
dspace.workflow.startDateTime | 2025-04-15T02:53:58.043Z | |
dspace.workflow.startDateTime | 2025-05-01T14:00:48.097Z | |
pu.contributor.authorid | 920250084 | |
pu.date.classyear | 2025 | |
pu.department | Electrical & Computer Engr |
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