Design and FPGA Implementation of WOMBAT: A Deep Neural Network Level-1 Trigger System for Jet Substructure Identification and Boosted 𝐻 → 𝑏̄𝑏 Tagging at the CMS Experiment

Abstract

This thesis investigates the physics performance, trigger efficiency, and Field Programmable Gate Array (FPGA) implementation of machine learning (ML)-based algorithms for Lorentz-boosted 𝐻 → 𝑏̄𝑏 tagging within the CMS Level-1 Trigger (L1T) under Phase-1 conditions. The proposed algorithm, WOMBAT (Wide Object ML Boosted Algorithm Trigger), comprises a high-performance Master Model (W-MM) and a quantized, FPGA-synthesizable Apprentice Model (W-AM), benchmarked against the standard Single Jet 180 and the custom rule-based JEDI (Jet Event Deterministic Identifier) triggers. All algorithms process calorimeter trigger primitive data to localize boosted 𝐻 → 𝑏̄𝑏 jets. Outputs are post-processed minimally to yield real-valued (𝜂, 𝜙) jet coordinates at trigger tower granularity. Trigger rates are evaluated using 2023 CMS ZeroBias data (0.64 fb^(−1)), with efficiency assessed via a Monte Carlo sample of 𝐻 → 𝑏̄𝑏 offline re-constructed AK8 jets. W-MM achieves a 1 kHz rate at an offline jet 𝑝𝑇 threshold of 146.8 GeV, 40.6 GeV lower than Single Jet 180, while maintaining comparable signal efficiency. W-AM reduces the threshold further to 140.4 GeV, with reduced efficiency due to fixed-output constraints and limited multi-jet handling. FPGA implementation targeting the Xilinx Virtex-7 XC7VX690T confirms that W-AM meets resource constraints with a pre-place-and-route latency of 22 clock cycles (137.5 ns). In contrast, JEDI requires excessive resource usage and a 56-cycle latency, surpassing the 14-cycle L1T budget. These results underscore trade-offs between physics performance and hardware constraints: W-MM offers the highest tagging performance but exceeds current FPGA capacity; W-AM is deployable with reduced efficiency; JEDI remains deployable with moderate efficiency but increased latency. Originally developed for Run-3 CMS L1T, WOMBAT serves as a proof-of-concept for Phase-2 triggers, where hardware advances will enable online deployment of more sophisticated ML-based L1T systems.